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HILRES’22 Summer School | Hardware in the Loop for Renewable Systems with SoC Platforms

HILRES’22 – technically sponsored by ESoC Technical Committee of IEEE Industrial Electronics Society – is a three-day design from scratch experience for students and professionals, for bare-metal SoPC based Hardware in the Loop platforms. Model, simulate and control a complete photovoltaic system using various design methodologies on low-cost SoC platforms in this comprehensive technical workshop.

The workshop will cover the following topics:

  • Fundamentals and Controlling a PV system.
  • Matlab / Simulink modelling and simulation of a PV system.
  • SoC & Designing with Zynq Architecture
  • Core to Core Communication
  • SoC FPGA Hardware/software co-design of a PV system with PYNQ boards
  • VHDL fundamentals
  • Co-simulation and FPGA in the Loop simulation of a MEPT controller.
  • FPGA-based for AC drive applications
  • Hardware in the loop fundamentals

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